SlipstreamJobsFresh Startup & VC-Backed Jobs

Staff Electrical Engineer - Aggregator

Apptronik - Austin, TX, USA - In-office - posted 2026-08-14

Apply on the company site

SlipstreamJobs tracks this role from the company's public career site. Apply directly on the employer's site.

Apptronik is seeking a Staff Electrical Engineer to architect the electronics and FPGA systems for Apollo's sensor bridge—a critical subsystem that aggregates multi-camera and IMU data while enabling real-time perception and safety functions for their humanoid robot. You will own the complete lifecycle of a multi-Gbps, mixed-signal PCBA from requirements and architecture through production release. This includes FPGA device selection, RTL development (VHDL/Verilog), high-speed interface design (CSI-2, GMSL2, 10GbE), power tree architecture, and board-level validation. The role demands deep expertise in signal integrity, impedance control, timing closure, and clock-domain crossing. Key responsibilities: - Define requirements, select components, capture schematics, guide layout, and develop RTL for a sensor aggregation board routing across dynamic robot joints - Design high-speed digital interfaces with proper signal integrity and EMC/ESD/thermal constraints - Develop FPGA RTL for camera synchronization, Ethernet packetization, and deterministic multi-sensor timing - Build and execute comprehensive validation plans; debug across hardware/RTL boundaries using lab equipment and first-principles analysis - Manage component lifecycle, vendor relationships, and design-for-manufacturability with contract manufacturers - Mentor junior engineers and collaborate cross-functionally with perception, software, mechanical, thermal, and systems teams - Drive technical leadership on design decisions, component roadmaps, and project execution Required experience: strong depth in FPGA hardware for time-sensitive, high-performance applications (image processing, high-speed data acquisition, real-time networking); FPGA device architecture and RTL development; high-speed interface design (CSI-2, GMSL, SerDes, Ethernet, PCIe); timing closure and clock-domain crossing; FPGA tool flows (Vivado, Quartus, Radiant); camera/image sensor hardware; and high-speed digital design fundamentals including signal integrity and impedance-controlled routing.

Similar roles