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Ambiq is a semiconductor company on a mission to enable intelligence everywhere by powering the AI edge revolution with ultra-low-power chip solutions. Since 2010, the company has shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications. The company operates across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore with cross-functional teams spanning design, research, development, production, marketing, sales, and operations.
We are seeking a Senior Validation Engineer to join Ambiq's Taiwan Validation Team and help validate next-generation ultra-low-power MCU and SoC products from first silicon through production. In this role, you will develop and execute validation plans, perform silicon characterization, automate validation testing, and debug complex hardware and firmware issues across digital, analog, mixed-signal, and low-power subsystems.
Key responsibilities include:
- Develop and execute post-silicon validation plans, functional tests, and automated regression suites for MCU and SoC subsystems
- Perform functional validation, electrical characterization, PVT testing, margin analysis, shmoo testing, and production test correlation
- Debug and resolve silicon issues using lab equipment, simulation tools, and firmware debugging techniques
- Collaborate with Architecture, Design, Verification, Firmware, Product Engineering, and ATE teams to ensure high-quality silicon and successful product releases
- Independently own major validation areas while contributing to validation automation, product quality, and continuous improvement across multiple silicon programs
- Develop test automation frameworks and scripts to improve validation efficiency and coverage
- Participate in design reviews and provide validation feedback early in the development cycle
You will work on cutting-edge low-power semiconductor technology, collaborating closely with cross-functional teams to ensure product quality and successful releases. This position offers the opportunity to make a significant impact on validation strategy and execution for multiple silicon programs.
