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Salary: USD 210,000 - 234,000 / annual
Muon Space, a LEO satellite constellation provider founded in 2021, is seeking a Staff Architect to define and evolve the end-to-end architecture of their onboard High Performance Compute (HPC) platform. This is a technical leadership role where you will serve as the center of gravity across FPGA, GPU, CPU, and onboard networking, pulling together architectural threads from across the engineering organization and shaping a coherent, mission-flexible compute platform that will fly on Muon spacecraft for years to come.
You will own the architecture process for onboard HPC, including how architectural decisions are proposed, discussed, documented, and ratified across the team and adjacent disciplines. You'll cluster and unify architectural concepts into a coherent, documented, company-wide HPC architecture. Key responsibilities include gathering architectural requirements from payload, mission ops, program management, and future mission concepts, then translating them into a forward-looking compute roadmap. You will drive cross-discipline architectural alignment across FPGA, GPU, and CPU compute and onboard networking, achieving consensus on data flows, processing pipelines, and compute partitioning.
You'll champion a network-first onboard architecture with modular, configurable compute components that can be instantiated in mission-specific ways. Partner closely with the electrical engineering team to ensure architectural decisions are executable in silicon, PCB, and harness design. Stay ahead of upcoming mission needs and continuously evolve the technical lineup so mission objectives can be met without one-off architectures. Communicate architecture broadly through diagrams, design docs, white papers, and tech talks so engineers, program managers, and leadership share a common mental model of the platform.
Required: Bachelor's or Master's in Computer Engineering, Computer Science, Electrical Engineering, or related field, plus 7+ years of professional experience in system-level or compute-platform architecture. Proven track record architecting heterogeneous compute systems combining FPGA, GPU, and CPU elements, ideally in embedded, aerospace, or high-performance edge environments. Deep understanding of onboard networking and data-flow architectures, including Ethernet-based fabrics, DMA, zero-copy, and real-time streaming pipelines. Ability to balance architectural purity with mission pragmatism. Demonstrated experience driving cross-team architectural consensus across hardware, firmware, and software disciplines. Excellent written and verbal communication skills. Ability and willingness to obtain and maintain a U.S. security clearance.
Nice-to-have: Direct experience with spacecraft avionics, payload compute, or space-grade FPGA/GPU platforms. Familiarity with onboard networking standards relevant to space (e.g., Ethernet, SpaceWire). Prior experience defining modular, mission-configurable compute platforms or product families. Background in safety- or mission-critical development processes. Prior authorship of architectural white papers or public technical publications.
