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Salary: USD 154,000 - 218,000 / annual
Lightmatter is a venture-backed leader in AI data center infrastructure, having raised $400M in Series D at a $4.4B valuation. The company invented Passage™, a 3D-stacked photonics engine that connects thousands to millions of processors at light speed for extreme-scale AI and HPC workloads.
As a Senior Design for Test Engineer, you will architect and deploy comprehensive test solutions across digital, analog, and photonic logic for next-generation AI platforms. You'll work cross-functionally with chip design, RTL, physical design, and product operations teams to drive DFT strategy from pre-silicon through silicon bring-up.
Key responsibilities include:
- Design chip, module, and system-level DFT solutions for integrated photonics-based AI platforms
- Develop and deploy DFT methodologies for next-generation products
- Architect integrated electronics/analog/digital test strategies including ATPG and boundary scan
- Collaborate with RTL designers on front-end integration and physical-design engineers on backend integration
- Create scalable, automated DFT flows that grow with the team and company
- Support initial silicon bring-up, debug, and validation
- Solve complex problems proactively in a fast-paced environment
You'll need at least 5 years of industry experience on DFT-related activities for advanced ASIC designs, with proven pre-silicon design expertise. Required skills include scripting (Python/TCL), solid DFT fundamentals (Scan, ATPG, memory test, JTAG), SoC architecture knowledge, HDL proficiency (Verilog), and hands-on experience with commercial EDA DFT tools (MBIST, ATPG, Boundary Scan).
Preferred qualifications include a Master's degree with 3+ years of ASIC experience and multiple production tapeouts, deep understanding of DFT standards and trade-offs, silicon debug and ATE data analysis skills, and knowledge of timing, physical design, and power implications of DFT structures.
