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Salary: USD 170,000 - 250,000 / annual
K2 Space is building the largest and highest-power satellites ever flown, backed by over $1 billion in funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price. The company has over $1 billion in signed contracts across commercial and US government customers and is mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space. With multiple launches planned for 2027 and plans to scale to 100 satellites per year, K2 is at the forefront of next-generation spacecraft engineering.
The role is a hands-on SerDes Characterization & Post-Silicon Validation Engineer responsible for bringing up, characterizing, and validating high-speed SerDes interfaces in complex SoCs. You will work closely with SerDes/IP, mixed-signal, digital, firmware, SI/PI, package, board, and systems teams to take high-speed interfaces from first silicon through product integration and system-level operation. You will also help build K2's high-speed test and validation capability from the ground up.
Key responsibilities include:
- Lead post-silicon bring-up and characterization of high-speed NRZ and PAM4 SerDes, including 112G-class interfaces
- Develop and execute electrical characterization plans across lanes, data rates, voltage, temperature, channels, and operating conditions
- Characterize TX eye quality, jitter, output amplitude, linearity, equalization, RX sensitivity, BER, bathtub curves, CDR performance, and link margin
- Validate TX/RX equalization including FFE, CTLE, DFE, adaptation, and link-training behavior
- Perform BER and stress testing across representative and worst-case channels
- Debug complex link issues spanning SerDes IP, clocks, power, package, PCB/channel, firmware, and digital logic
- Correlate silicon measurements with SerDes models, simulations, and channel/SI analysis
- Partner with firmware and digital teams on SerDes configuration, initialization, diagnostics, adaptation, and system-level link bring-up
- Develop automated characterization and regression environments for instrument control, data collection, analysis, and reporting
- Support the transition from chip-level SerDes characterization to product integration and system-level validation
- Contribute to building the high-speed validation lab, equipment, test infrastructure, measurement methodology, and automation from the ground up
Requirements:
- BS/MS in Electrical Engineering, Computer Engineering, or related field
- 5+ years of high-speed SerDes characterization, post-silicon validation, signal integrity, or related experience
- Strong understanding of high-speed serial-link fundamentals, including NRZ/PAM4 signaling, equalization, CDR, jitter, BER, channel loss, and link budgets
- Deep hands-on experience with high-bandwidth oscilloscopes, BERTs, pattern generators, VNAs, TDR/TDT, and high-speed electrical measurement equipment
- Experience with eye diagrams, jitter decomposition, bathtub curves, BER testing, stressed-eye testing, and receiver sensitivity characterization
- Strong understanding of package/PCB channels, insertion/return loss, crosstalk, reflections, and channel de-embedding
- Experience developing automated characterization environments using Python or similar scripting languages and instrument-control interfaces
- Strong debugging skills across silicon, package, PCB, firmware, and system boundaries
- Ability to work closely with SerDes IP/design, SI, package, board, firmware, and digital teams
Preferred qualifications include experience with 112G+ PAM4 SerDes characterization and validation, Ethernet/PCIe/JESD204/Interlaken/chip-to-chip interfaces, compliance testing and high-speed interface standards, SerDes behavioral/channel models and simulation-to-measurement correlation, SerDes IP integration from third-party vendors, advanced package and high-loss PCB channels, high-speed clocking/PLLs/reference-clock jitter, and automated PVT characterization with large-scale measurement data analysis.
Note: This role requires U.S. Person status or eligibility for a federally issued export control license due to ITAR compliance requirements.
