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Lumilens builds optical interconnect for AI data centers, including silicon photonics, mixed-signal ICs, electrical-optical interposers, and systems integration. The company's silicon is already shipping in production AI clusters with rapidly growing volume.
You will own test strategy and execution for mixed-signal ICs—SerDes, TIAs, modulator drivers, and control silicon—that form the core of co-packaged optics and pluggable transceivers. Your scope spans first-silicon bring-up on the bench through multi-site production programs at OSATs, managing yield and cost-per-unit targets critical to shipping commitments.
Based in Singapore, you will be the senior test voice on the ground, working directly with OSATs and test houses while partnering with design and validation teams across the US, India, and Singapore. You will own test strategy for one or more ICs, including coverage planning, test list definition, and insertion flow (wafer sort, final test, system-level). You will develop, debug, and optimize ATE test programs for mixed-signal and high-speed devices, covering analog and DC parameters, high-speed signal paths, on-chip test points, digital scan, and firmware-driven test modes.
You will specify and bring up test hardware—load boards, probe cards, socketing, and opto-electrical fixturing for photonics-attached parts—working with vendors through layout, fabrication, and first-article inspection. You will drive first-silicon bring-up alongside design and validation teams, correlating ATE results to bench characterization and system-level performance, and closing gaps when they diverge.
You will own relationships with regional OSATs and test houses, managing program release, correlation across testers and sites, multi-site and throughput optimization, capacity planning, and day-to-day production support. You will analyze sort and final test data to identify yield limiters, marginal tests, and guard-band issues, leading failure analysis and root-cause investigation on returns and excursions.
As the Singapore team grows, you will set standards for test execution—reusable test IP, data infrastructure, documentation, and review practices—and mentor junior test engineers.
REQUIREMENTS:
- BS/MS in Electrical Engineering, Computer Engineering, Physics, or related field
- 8+ years developing production test for mixed-signal or high-speed ICs, including at least one program from first silicon through high-volume production
- Deep hands-on ATE experience on at least one major platform (Advantest 93K or T2000, Teradyne UltraFLEX or J750, Eagle, Chroma, or comparable)
- Strong programming in C/C++ and Python on Linux; ability to write readable, extensible test code
- Solid analog and mixed-signal fundamentals: schematic reading, datasheet reasoning, measurement design
- Practical test hardware skills: load board and probe card design review, signal integrity at speed, bench instrumentation (scopes, BERTs, SMUs, network analyzers, VNAs), lab debug
- Statistical fluency for yield and correlation work (JMP, MATLAB, Python/pandas, or equivalent)
- Direct experience running programs at OSATs and managing external test partners
- Willingness to travel regionally to test sites and overlap with US and India hours during bring-ups or excursions
PREFERRED:
- Established relationships with OSATs and test houses in Singapore, Malaysia, Taiwan, or the Philippines
- High-speed SerDes test experience at 100G/lane and above (BER, jitter decomposition, eye margining, loopback methods)
- Silicon photonics, optical transceiver, or opto-electrical test background (coupled-fiber test, optical power and wavelength measurement, TIA and driver characterization)
- DFT familiarity (scan, MBIST, JTAG/IEEE 1149, on-chip instrumentation and monitors)
- STDF and test data pipelines; analytics that engineers use
- Experience defining test for a first-generation product line where nothing existed yet
