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IonQ is seeking a Senior FPGA Verification Engineer to join its FPGA team in Oxford. The role focuses on designing and implementing advanced verification test benches and simulation infrastructure for quantum control systems. You will architect and develop UVM/SystemVerilog verification environments for complex FPGA designs, define and execute comprehensive verification plans including constrained-random testing and functional coverage analysis, and collaborate with RTL design engineers to debug issues and ensure high-quality implementation. Key responsibilities include maintaining automated regression suites and continuous integration pipelines to ensure design stability throughout the development lifecycle.
The ideal candidate brings 4–6 years of professional FPGA verification experience and a Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. You should have strong proficiency in SystemVerilog and UVM, experience with Python for test automation and scripting, and demonstrated ability to lead requirements gathering and translate technical specifications into robust verification strategies. You will work collaboratively across design teams to support IonQ's mission of delivering world-class quantum control systems. This is an individual contributor role with significant technical ownership and architectural responsibility for critical simulation infrastructure.
