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Salary: USD 166,000 - 220,000 / annual
Anduril Industries is a defense technology company transforming U.S. and allied military capabilities through advanced technology. The company's Lattice OS is an AI-powered operating system that integrates thousands of data streams into real-time 3D command and control centers. Anduril Cyber is a new business line focused on enabling offensive cyber missions, leveraging the company's fleet of autonomous vehicles, mesh networks, and hardware products to deploy cyber capabilities in unconventional or difficult-to-reach environments.
The Senior DSP Engineer role is part of the Cyber team and focuses on signal processing, waveform analysis, and algorithm implementation. This position emphasizes practical algorithm ownership and close partnership with FPGA, software, and systems engineering teams.
Key responsibilities include:
- Develop and evaluate signal-processing approaches for detection, characterization, demodulation, channelization, and spectral analysis
- Translate analytical models and early-stage algorithms into production-ready implementations integrated with FPGA and software systems
- Characterize throughput, fidelity, timing, and robustness tradeoffs using measured data and disciplined performance analysis
- Partner with FPGA engineers on architecture partitioning, samples-per-clock tradeoffs, and implementation constraints
- Create documentation, analysis artifacts, and technical recommendations supporting design reviews and engineering decisions
- Contribute to a hands-on engineering culture valuing experimentation, measurement, and rapid technical iteration
Required qualifications include strong background in digital signal processing (FFT/PSD analysis, channelization, demodulation, filtering, waveform analysis), proficiency in Python and/or MATLAB, experience converting signal-processing concepts into deployable implementations while managing fidelity and throughput, solid understanding of RF-domain concepts and sampled wideband systems, ability to design and interpret experiments evaluating timing and spectral behavior, and strong cross-functional collaboration skills across DSP, FPGA, systems, and software boundaries.
Preferred qualifications include experience with GNU Radio or SDR tooling, background with FPGA/SoC-based systems, experience with real measured data sets and lab characterization workflows, familiarity with customer-facing technical briefings, and track record of mentoring junior engineers or leading signal-processing work across teams.
