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Graphcore, a leading AI compute innovator and member of the SoftBank Group, is seeking a Principal Debug Validation Engineer to lead post-silicon debug and validation activities for next-generation AI compute silicon and systems. Reporting to senior leadership within Architecture and Validation, you will drive the identification, reproduction, analysis and resolution of complex silicon, firmware and system-level issues during bring-up, characterization and product readiness phases.
You will lead the Post-Silicon Debug and Validation team, which sits within the Architecture and Validation organization and is responsible for the full product lifecycle—from first silicon bring-up through subsystem validation, system integration and production readiness. This role combines deep technical debugging expertise with strong cross-functional collaboration across architecture, RTL, firmware, software and systems engineering disciplines.
Key responsibilities include: leading post-silicon debug and validation activities across multiple projects; investigating and resolving complex issues spanning silicon, firmware, software and system levels; developing structured debug methodologies and failure analysis processes; collaborating with cross-functional teams to identify root causes and implement corrective actions; driving debug of CPU, memory, interconnect and high-speed I/O subsystems; developing and enhancing automated debug, regression and validation infrastructure using Python; analyzing logs, traces, telemetry and hardware data to isolate failures; supporting validation test development and custom diagnostics; defining validation metrics and debug workflows; driving continuous process improvement; and communicating technical risks and recommendations to leadership.
Essential qualifications include strong bare metal environment experience, deep knowledge of SoC and platform architectures, expertise in debug infrastructure and post-silicon debug methodologies, strong programming skills in Python and C, experience with post-silicon validation in digital ASIC environments, proficiency in Linux, deep knowledge of scan, DFT, JTAG and trace infrastructure, and strong debug skills including fault tree analysis and system-level debug techniques. You should be a highly motivated self-starter with exceptional communication skills, collaborative approach, and ability to work independently on technically complex activities across hardware, firmware and software domains.
