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Muon Space is seeking a Platform Engineer to own the shared technical foundation of the High Performance Compute (HPC) team. This is an individual-contributor, engineering-track role focused on building and maintaining the infrastructure that transforms FPGA and GPU engineering output into flight-ready artifacts for space missions.
You will own the complete build flows, test environments, and delivery pipelines for both FPGA and GPU code, ensuring reproducible, reliable, and fast turnaround from commit to lab-ready artifact. You'll maintain and evolve toolchain environments including synthesis, simulation, cross-compilation, and containerized builds, keeping them up-to-date, documented, and consistent across the engineering team.
As Muon takes on more missions with varied compute needs, you'll manage the complexity of delivering into a growing variety of future missions by actively working to keep mission-to-mission variations minimal and promoting shared components across the platform.
Beyond pure infrastructure, you'll operate at the intersection of delivery methods and planning methods. You'll own the team's Jira roadmap, keeping it accurate and trackable; enable on-demand snapshot reporting showing progress, priorities, and resource utilization; and partner with tech leads to estimate incoming work packages. You'll establish and track planning-accuracy metrics to improve estimation quality over time.
You'll be the single source of truth for status and progress, publishing weekly health reports for both internal and cross-company audiences. You'll also own the team's Confluence documentation space, keeping it representative of actual work and supporting engineers in contributing content. You'll partner with engineering managers to maintain comprehensive onboarding and training materials covering tooling, build flows, and platform documentation.
Required: Bachelor's in Computer Science, Computer Engineering, Electrical Engineering, or related field, plus 3+ years of professional engineering experience. Hands-on development with FPGA and/or GPU workflows, including synthesis/compilation toolchains, simulation/profiling environments, and build/release pipelines. Experience owning or significantly contributing to build systems and integration pipelines for embedded or hardware-adjacent codebases. Demonstrated ability to manage variation and complexity across multiple products or missions. Comfort scripting to automate toolchains and orchestrate pipelines. Fluency with Jira and Confluence. Proven ability to drive estimation and planning discussions with engineers and translate technical work into clear roadmaps for non-technical stakeholders. Excellent written and verbal communication skills.
Nice-to-have: Prior role as Platform, DevOps, or Build/Release engineer supporting FPGA or GPU teams. Hands-on experience with FPGA build flows (Vivado, Quartus) or GPU cross-compilation for embedded platforms (NVIDIA Jetson/IGX). Experience managing shared platforms across multiple downstream consumers. Hardware-in-the-loop test automation experience. Containerization and development pipeline tooling familiarity. Prior exposure to space, aerospace, or mission-critical engineering environments.
