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Phinity is an AI research lab focused on autonomous chip design. The company is building AI agents and RL environments to enable autonomous tape-out of chips from architecture through post-silicon validation. The team combines deep AI expertise with silicon design leadership from top chip companies including NVIDIA, Intel, and MediaTek.
As Physical Design Lead, you will lead the physical design function and drive block-level to full-chip optimizations. Key responsibilities include:
- Leading PD flows and optimization strategies across block and full-chip levels
- Defining synthesis-to-layout flows, including power delivery networks (PDN), clock trees, PVT corner analysis, and custom cell definitions
- Implementing and owning characterization flows for custom cells and memory blocks
- Executing IP and full-chip design optimizations in collaboration with PD engineers
- Identifying optimization opportunities in design utilization, power grid, and clock network
- Delivering tapeout-ready designs optimized for target PPA metrics, leveraging in-house prompt-to-GDS capabilities
You will work directly with founders to shape strategy and growth, take ownership of high-impact initiatives, and collaborate with leading AI researchers and hardware experts at the frontier of autonomous chip design.
Benefits: health insurance, retirement plans, unlimited PTO, paid parental leave, in-office lunch and dinner.
