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IonQ is seeking a Photonic Layout Engineer to join the QPU Design team at Oxford Ionics/IonQ. In this role, you will design and layout photonic integrated circuits (PICs) that form a central part of IonQ's Quantum Processor Units (QPUs), the novel technology at the heart of their quantum computers.
You will be responsible for arranging and routing photonic components on complex multi-layer chips, integrating photonic elements with metal tracks and CMOS routing. Your work will support on-chip light delivery systems that enable scaling to thousands of qubits and beyond. You will produce reticle-size photonic layout files using Python scripts as part of tape-out for commercial foundries, directly contributing to the development of utility-scale quantum computers.
Key responsibilities include:
- Collaborating with scientists and engineers to understand design requirements and constraints
- Interfacing with photonic designers, test engineers, packaging engineers, and fabrication engineers to define design rules and shape component design
- Performing layout verification through DRC (Design Rule Check) and LVS (Layout Versus Schematic)
- Contributing to custom layout Process Design Kits (PDKs) specific to IonQ and foundry partners
- Documenting the layout process and final tape-out mask files
This position requires significant experience in the design and layout of Photonic Integrated Circuits (PICs), with the ability to balance requirements and constraints from multiple engineering disciplines. You will work closely with a multidisciplinary team of scientists and engineers to bring novel ion-trapping chip designs into production, playing an important role in shaping the hardware that supports advanced quantum systems.
