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Salary: USD 157,000 - 176,000 / annual
Lightmatter is a venture-backed AI infrastructure company that invented the world's first 3D-stacked photonics engine (Passage™) for next-generation data centers. The company recently raised $400M in Series D funding at a $4.4B valuation and is scaling rapidly across all departments.
As a Package Layout Engineer, you will drive the design and development of IC package substrates for Lightmatter's advanced photonics and AI computing products. You'll be part of the Signal Integrity, Power Integrity, and Packaging team, responsible for delivering substrate layouts that meet stringent performance and manufacturing requirements.
Key responsibilities include:
- Designing IC package substrate layouts for standard and advanced packaging technologies
- Contributing to product concept phases with preliminary substrate designs and floorplanning
- Collaborating with package substrate suppliers and OSAT (Outsourced Semiconductor Assembly and Test) companies on design rules and implementation guidelines
- Generating fab files and coordinating DFM (Design for Manufacturing) and DFA (Design for Assembly) closure
- Ensuring designs meet signal integrity, power integrity, thermal, and mechanical requirements
- Supporting analog and digital interface design across complex multi-domain systems
- Working with signal/power integrity engineers on iterative test routes and design rule refinement
- Coordinating cross-functional execution of package design tape-outs
- Supporting design automation and verification improvements
Required qualifications:
- B.S. or M.S. in Electrical Engineering or related discipline
- Minimum 5 years relevant experience, with 3–5 years specifically in IC package layout design
- Proficiency with Allegro X APD
- Strong understanding of IC package substrates, organic materials, and their design impacts
Preferred experience includes IC packaging background, system-level validation tools (Cadence Integrity 3DIC), layout tool familiarity (Expedition, Pads, Altium), scripting for design automation (SKILL, Python), and exposure to advanced packaging architectures (2.5D/3D IC, silicon interposers, EMIB, fan-out chip-on-wafer). Excellent cross-functional collaboration skills are valued.
The role offers a hybrid workplace model with competitive compensation, equity grants, comprehensive benefits, and professional development opportunities.
