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Salary: USD 110,000 - 170,000 / annual
Arista Networks is seeking an FPGA Design Engineer to join the Hardware Design Engineering team, which develops high-speed networking and Ethernet products for enterprise campuses, hyperscaler data centers, and AI clusters.
You will be a core member of the FPGA Design and Verification team, owning the full design lifecycle of high-performance control path FPGAs that power Arista's flagship data center platforms. This includes gathering architectural requirements, reviewing board schematics, executing rigorous verification, leading system bring-up, and supporting production deployment.
Key responsibilities include:
- Developing, integrating, simulating, and verifying Verilog and SystemVerilog RTL code with custom testbench creation
- Executing the full FPGA development flow: synthesis, place and route, timing closure, and in-system hardware debugging
- Collaborating with hardware and software engineering teams on rapid bring-up and debugging of next-generation network switch platforms
- Participating in peer RTL code reviews and PCB schematic/board design reviews
- Developing Python, Tcl, or shell scripts to automate FPGA design workflows
You will gain expertise in switching architectures (data and control paths), critical I/O interfaces (PCIe, Interlaken, Ethernet PHY/MAC, SMBus, SPI, MDIO, JTAG), Ethernet-based protocols (PTP, sFlow, PoE), real-world FPGA challenges (timing closure, resource optimization, clock domain crossing), multi-vendor FPGA ecosystems, and cross-functional system design including PCB schematic interpretation and advanced simulation frameworks.
Requirements:
- 2+ years of hands-on experience in Verilog/SystemVerilog RTL design
- Proven background in Control Path design
- Direct experience with On-Chip Bus interfaces (I2C, SPI, MDIO, PCIe, AXI)
Preferred qualifications:
- Experience with Ethernet Data Path architecture and design
- Hands-on experience with Streaming Bus interfaces (AXI-Stream)
- Background in FPGA resource management and timing closure
- Proficiency in Python, Tcl, or general scripting for EDA tool automation
- Lab debugging and validation experience using logic analyzers, oscilloscopes, and vendor-specific debug tools
