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Apple's design team is seeking an experienced engineer to develop multiple intellectual properties (IPs) for Apple SoCs across Storage, Computer Vision, and RISC-V CPU domains. The role focuses on micro-architecture definitions, RTL coding, block-level simulations, and synthesis of digital designs. You will collaborate with partner design teams, physical design, verification, platform architecture, and software teams to define IP micro-architecture, implement required hardware, and integrate it into multiple sub-systems within Apple SoCs. Responsibilities include synthesizing digital designs to the latest process nodes and participating in the implementation process. This is a technically challenging role offering a broad system view into complex, control-oriented IPs. The position is available at Apple sites in Herzliya, Haifa, and other Israeli locations.
Minimum qualifications include 3+ years of VLSI design experience with Processor Cores or SoCs, familiarity with advanced design practices (clock/voltage domain crossing, low-power design), strong Verilog/SystemVerilog skills, and experience with backend tools (synthesis and STA). Programming experience with Perl, C, Python, or TCL is required. A BS or MS in Electrical Engineering or Computer Engineering is required.
Preferred qualifications include familiarity with verification methodologies, CPU/ARM instruction set standards, and various backend design tools. This role offers the opportunity to work on groundbreaking Apple hardware products with a team dedicated to innovation and excellence.
