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Salary: USD 125,000 - 291,000 / annual
Neuralink is developing brain-machine interface devices that restore movement to the paralyzed, restore sight to the blind, and revolutionize human-digital interaction. The Brain Interfaces SoC Department designs and implements neural recording and stimulation system-on-chip (SoC) architectures for high-bandwidth applications.
As an Analog IC Design and Verification Engineer, you will own analog and mixed-signal chip design from circuit design through layout and verification. Key responsibilities include:
• Design analog circuit building blocks and subsystems at transistor level, meeting challenging specifications for noise, mismatch, distortion, power consumption, and cost
• Collaborate with layout teams to oversee block-level layout across multiple blocks
• Plan and execute analog verification strategies for IP blocks or full chips, running complex simulations and analyses (power, performance, linearity, yield)
• Design, program, and execute complex tests; review junior team members' test work and ensure thorough issue analysis
• Consult with internal stakeholders and external vendors to guide implementation and ensure alignment with requirements
Required: BS in electrical engineering or related field plus 5+ years post-degree experience in analog/mixed-signal CMOS circuit design (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, audio codecs, high-speed PHY/SERDES) with proven silicon validation track record. You are analytical, excited about building, and enjoy tackling novel problems.
Preferred: MS or PhD in EE/physics; design for high-volume production; lab testing of precision analog/mixed-signal ICs; Verilog AMS and SystemVerilog modeling; advanced CMOS FinFET experience; scripting and simulation automation skills.
This is a full-time role offering competitive base salary, RSU equity, medical/dental/vision insurance, paid holidays, commuter benefits, meals, 401(k), parental leave, and flexible time off.
