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CesiumAstro develops advanced communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We are seeking a Staff FPGA Verification Engineer to provide technical leadership for the verification of FPGA-based hardware solutions.
In this role, you will lead complex FPGA verification, debugging, and qualification activities supporting product development. You will evaluate simulation results and engineering risks while directing solutions that improve product performance and reliability. Key responsibilities include:
- Lead complex FPGA verification, debugging, and qualification activities supporting product development
- Evaluate simulation results and engineering risks while directing solutions that improve product performance and reliability
- Validate FPGA designs through verification planning, qualification testing, failure analysis, root cause investigations, and engineering change implementation
- Develop verification plans and verification review packages supporting engineering decisions
- Support customer meetings, design reviews, technical discussions, hardware integration, and product development activities by providing FPGA engineering guidance
- Evaluate FPGA verification methods and technical requirements to identify improvements
- Drive initiatives that enhance FPGA performance, engineering efficiency, product reliability, design quality, and long-term maintainability
You will work in a dynamic, cross-functional startup environment with hands-on, interactive, and autonomous work opportunities. This position contributes to product development by establishing FPGA verification methodologies, resolving complex engineering challenges, and advancing FPGA solutions that improve product performance, reliability, and mission success.
REQUIREMENTS:
- Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution
- 8 years of industry or university research experience in the design, analysis, and implementation of FPGA systems at the HDL level
- Extensive knowledge of digital logic design, FPGA architecture, hardware description languages (HDL), and digital systems
- Considerable proficiency developing FPGA verification environments for complex products
- Thorough understanding of FPGA verification methodologies, timing closure, embedded systems, and high-speed interfaces
- Working knowledge of the UVM Framework (UVMF), including developing reusable testbenches, verification components, and automated test environments
- Proficiency with Microsoft Office Suite (Outlook, Word, Excel, PowerPoint, Teams)
- FPGA development, simulation, and synthesis tools (e.g., Vivado, Quartus Prime, ModelSim, QuestaSim, or equivalent)
- Engineering analysis, version control, and collaboration tools (e.g., MATLAB, Git, Jira, Windchill, or equivalent)
- Excellent written and verbal communication skills
PREFERRED EXPERIENCE:
- Experience with worst-case analysis, failure method and criticality analyses, and reliability analysis
- Familiarity with digital communications and digital signal processing
- Experience with board-level hardware design
- Demonstrated ability to work efficiently with a distributed team
- Proficiency with git source code control
- Experience developing firmware using agile flows
Note: Applicant must be a U.S. citizen, lawful permanent resident, conditional resident, asylee, or refugee, or eligible to obtain required authorizations from the U.S. Department of State to comply with U.S. Government Space Technology Export Regulations.
