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Mythic is seeking a Senior Semiconductor Test Engineer to own the end-to-end production test strategy for the company's silicon products. This is a hands-on technical role with significant scope and ownership across the full test lifecycle.
You will be responsible for developing and optimizing test programs from early silicon bring-up through production release and volume ramp. This includes ownership of Wafer Sort and Final Package Test flows, test methodology development, screening philosophy, and release criteria. You'll drive silicon characterization, correlation, guardbanding, and test transfer into manufacturing environments.
Key responsibilities include:
- Developing, debugging, and releasing test programs on ATE (Automated Test Equipment) platforms in production
- Converting and translating test patterns from STIL, WGL, and VCD formats into ATE-specific formats
- Yield and quality analysis: identifying systematic failures and escapes, driving them to root cause
- Day-to-day technical collaboration with OSATs (Outsourced Semiconductor Assembly and Test providers), foundries, and ATE vendors to deploy and sustain test flows
- Managing tradeoffs across test coverage, cost, test time, quality, and ramp schedule
- Building infrastructure, automation, and analytics for production test and yield learning
- Cross-functional work with design, DFT, product, reliability, and operations teams
Success in the first year means robust, scalable Wafer Sort and Final Test flows in production; smooth product transitions from bring-up to manufacturing with strong coverage; early detection and rapid root-cause analysis of yield issues; and stable, efficient, scalable test programs.
REQUIREMENTS:
Required:
- 5+ years in semiconductor test engineering, product engineering, or production test development
- Hands-on ownership of Wafer Sort and Final Package Test
- Developing, debugging, and releasing test programs on ATE platforms in production
- Converting and translating test patterns from STIL, WGL, and VCD into ATE-specific pattern formats
- Solid grounding in manufacturing test flows, device screening, test coverage, guardbanding, and outgoing quality
- Experience taking silicon through bring-up, characterization, yield ramp, and production release
- Strong debug skills and fluency with manufacturing test data
- Experience working with design, DFT, product, reliability, and operations teams
Preferred:
- Testing mixed-signal or analog silicon, including trim and calibration
- Experience with AI, accelerator, or high-performance compute silicon
- Experience with Advantest, Teradyne, or similar ATE platforms
- Probe cards, load boards, hardware interfaces, and test hardware debug
- DFT structures such as scan, MBIST, and boundary scan
- Managing OSATs and other external manufacturing partners
- Scripting, automation, and test-data analysis (Python, JMP, or yield-analysis tools)
- Track record of reducing test time and improving yield and correlation during ramp
