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Normal Computing is an applied AI company building foundational hardware and software for the semiconductor industry and critical AI infrastructure. The company operates across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As Simulator & Debug Tools Lead, you will own the development of a custom hardware simulator and integrated debugging/profiling tools that the compiler and hardware teams depend on to validate their work before silicon. This is a hands-on technical leadership role where you balance competing priorities—fidelity, speed, and tooling—and make architectural decisions that keep the rest of the team unblocked.
Key responsibilities include:
- Architect and own the roadmap of the hardware simulator, ensuring accuracy, performance, and coverage of new hardware features as they land
- Establish behavioral correctness so compiler and runtime engineers can trust the simulator's output
- Build debuggers, tracers, and profilers that engineers actually adopt and use to find and fix bugs quickly
- Partner with Design Verification and bring-up teams to correlate the simulator with RTL, FPGA prototypes, and eventually silicon
- Create simulator benchmarks and traces from real LLM inference workloads to measure fidelity against actual chip requirements
- Make and communicate tradeoff decisions between simulator fidelity, speed, and tooling investment to compiler and hardware teams
The role sits at the intersection of hardware design and software tooling. Normal's hardware runs memory-bound inference inside memory itself rather than shuttling weights to a processor—a novel architecture that requires custom simulation infrastructure.
REQUIREMENTS:
- Experience building or leading development on hardware simulators (cycle-accurate or functional) for ASICs or novel compute architectures
- Demonstrated tooling instincts: have built debuggers, tracers, or profilers that other engineers actually adopted
- Systems and compiler context sufficient to simulate both the software stack and hardware itself
- Comfort working in environments where the hardware being simulated is still evolving
- Fluency in C++ or Rust for simulator performance; familiarity with Python for tooling
BONUS:
- Experience with in-memory compute or other non-von-Neumann architectures
- Experience building simulators that directly fed into architectural or compiler decisions (not just post-hoc validation)
- Open-source simulation, tracing, or hardware-tooling community involvement
- Background spanning both pre-silicon simulation and post-silicon bring-up
