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Salary: USD 250,000 - 300,000 / annual
DensityAI is seeking a Silicon Validation Engineer to own end-to-end silicon validation for their AI accelerator. This is a hands-on role spanning the full lifecycle: pre-silicon validation on emulation and FPGA platforms, first silicon bring-up in the lab, and production ramp support.
You will create comprehensive validation plans and build the validation environments—including firmware, test applications, diagnostics, and automation—that prove silicon works at scale. You'll develop test automation infrastructure capable of scaling across tens to thousands of silicon samples and thousands of test hours, with automated triage. Your responsibilities include leading silicon and system bring-up from first power-on through full post-silicon validation, including functional validation, power and performance characterization, and PVT (process, voltage, temperature) characterization.
You'll debug and root-cause issues across emulation, silicon, system hardware, firmware, and software layers. You'll support production ramp activities including system-level test (SLT), board and system test, field deployment, and RMA analysis. This role requires close collaboration with architecture, RTL, design verification, firmware, software, board and system hardware, product and test engineering teams, and external partners.
REQUIREMENTS:
- 5+ years of experience in silicon validation, post-silicon bring-up, or related field on complex SoCs or accelerators
- Strong coding skills in C, C++, and Python; embedded and/or bare-metal programming experience required
- Hands-on experience with pre-silicon validation on emulation platforms (Palladium, ZeBu, Veloce) and FPGA prototyping platforms (Protium, HAPS, or equivalent)
- Proven silicon and system bring-up experience from first chip power-on through full post-silicon validation
- Strong debug skills and fluency with debug tools: waveform debug (Verdi, FSDB), JTAG debuggers, oscilloscopes, logic analyzers
- Experience building test automation and triage infrastructure that scales across large sample sets
- Deep expertise in one or more of: AI workloads/kernel operators/collectives, PCIe Gen5/6/7, DRAM and HBM, power and power management, silicon and system performance, 112G/224G SerDes and networking (RDMA), silicon debug and RAS features, secure boot
- Experience supporting production ramp: SLT, board and system test, field deployment, RMA analysis
- Strong collaboration and communication skills across silicon, systems, and external partner teams
