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Salary: USD 148,000 - 222,000 / annual
Relativity Space is building rockets to serve today's needs and tomorrow's breakthroughs. The Terran R vehicle will deliver customer payloads to orbit, meeting growing demand for launch capacity. The Avionics team is responsible for the full lifecycle of Terran R's nervous system—designing, building, testing, installing, and operating the hardware that connects and controls every major electrical system on the vehicle and ground.
As a Senior FPGA Engineer on the digital electronics team, you will analyze, design, and test custom FPGA firmware on the Terran R launch vehicle. You will oversee development for FPGAs across multiple products through the entire product lifecycle from concept to flight maturity, including initial design, board bring-up, design verification, qualification, initial flight production, integration, and vehicle operations. You will work with cross-functional partner teams across the company—propulsion, GNC, fluids, and stage engineering—to ensure seamless integration and operation.
This is a high-ownership role where you'll help shape Terran R's fundamental avionics architecture and be given significant responsibility for components that will fly. The role combines deep technical expertise in electronics design with sound project management skills to ensure hardware projects are both reliable and on-schedule.
The Avionics team leverages close partnership between avionics design, manufacturing, and test to enable rapid iteration and feedback loops. Engineers are deeply embedded into other functions within Relativity, working closely with multiple engineering disciplines. You'll have autonomy, ownership, and impact at every level—solving problems that haven't been solved before and seeing your work come to life in record time.
**Requirements:**
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 5+ years of experience in FPGA development with meaningful experience in DSP/SDR applications for mission-critical systems (launch vehicles, spacecraft, aircraft, or robotics)
- Strong grounding in digital communications theory: modulation schemes, matched filtering, synchronization (timing/carrier recovery), equalization, and forward error correction
- Proficiency in DSP fundamentals: multirate signal processing, filter design, FFT-based processing, and fixed-point quantization analysis
- Technical expertise in FPGA development across full lifecycle—RTL design, verification, synthesis, timing analysis, and bring-up/validation—with algorithms implemented in VHDL, Verilog, or SystemVerilog
- Experience with one or more code generation or High Level Synthesis (HLS) languages including SpinalHDL, Chisel, Vitis, SystemC, or Simulink
- Experience with high-speed data converter interfaces (JESD204B/C or similar) feeding DSP pipelines
- Experience with hardware bring-up, validation, debugging, and data analysis
- Familiarity with a wide variety of FPGA toolchains and SoC platforms across industry leaders like AMD Xilinx, Intel, Microchip, etc.
**Nice to haves:**
- Experience with SDR frameworks or platforms (USRP, RFSoC, GNU Radio) or custom SDR hardware
- Familiarity with algorithm modeling tools (MATLAB, Simulink, or Python/NumPy) for pre-RTL algorithm development
- Familiarity with RISC-V development toolchain (linker scripts, compilers)
- Familiarity with rigorous software development processes including version and configuration control, change traceability, code coverage analysis, CI/CD build pipelines
