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Salary: USD 160,000 - 290,000 / annual
CHAOS Industries, a defense technology company founded in 2022 and backed by $1B in funding from top-tier investors (8VC, Accel, NEA), is seeking a Senior Embedded Firmware Engineer specializing in FPGA design. The company develops advanced sensing and detection solutions powered by Coherent Distributed Networks (CDN™) for warfighters, commercial air operators, and border protection teams.
In this role, you will design and implement complex FPGA designs targeting next-generation radar and sensor products. You'll support system integration of FPGA designs with complex software systems, collaborate with cross-functional teams, and provide technical support for deployed FPGA capabilities used by U.S. and international customers. This is a highly collaborative position that offers opportunities to expand your skillset across multiple product families within the defense and aerospace domain.
You will work full-time on-site at the Hawthorne, California office. The role requires deep expertise in digital RTL design, the complete FPGA design lifecycle (RTL design, behavioral simulation, place and route, timing analysis, hardware integration), and proficiency with Verilog and SystemVerilog. You must have extensive experience with ARM AMBA AXI protocols (AXI4, AXI4-Lite, AXI4-Stream) and AMD (Xilinx) Vivado Design Suite with SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal).
Preferred qualifications include experience with baseband signal processing, Simulink/MATLAB algorithm translation to RTL, software driver development (C/C++/Python), high-speed Ethernet IP blocks, Software-Defined Radios, ground/airborne sensors (radars, EO/IR, EW), time synchronization technologies, HLS synthesis, PCB design, DoD security clearance, GPUs/AI engines, and DoD system architectures (OMS, SOSA, Link-16).
CHAOS offers competitive benefits including 100% company-paid medical, dental, and vision coverage; 401(k) with 50% match up to 6% of pay; FSA/HSA; life insurance; free daily lunch; no-meeting Fridays; unlimited PTO; casual dress code; competitive base salary; generous pre-IPO stock options; and relocation assistance.
**Requirements:**
- Bachelor's degree or higher in Computer Engineering, Electrical Engineering, Computer Science, or related field
- 5+ years of professional experience performing detailed digital RTL design targeting FPGAs
- Extensive experience with entire FPGA design lifecycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
- Extensive experience developing in Verilog and SystemVerilog
- Extensive experience with ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
- Extensive experience with AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
- Experience with Network Protocols (TCP/UDP/IP)
- Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
- Experience using Bash and Python for scripting and testing
- Experience modifying software drivers and applications to validate FPGA designs
- Experience with Agile lifecycle processes (Scrum, Continuous Integration, Test-Driven Development)
- Ability to work with minimal supervision and collaborate on small teams
- U.S. Person status required (position requires access to U.S.-only data systems)
