SlipstreamJobs tracks this role from the company's public career site. Apply directly on the employer's site.
Salary: USD 150,000 - 220,000 / annual
True Anomaly is seeking a Senior FPGA Developer to lead the architecture, implementation, and verification of complex FPGA-based systems for spacecraft. You will own your technical domain end-to-end—from requirements capture and architecture definition through simulation, integration, and on-orbit support—while managing ambiguity and driving cross-team delivery with minimal oversight.
Key responsibilities include:
- Lead architecture and implementation of complex FPGA systems with multiple clock domains, high-speed interfaces, and stringent reliability requirements
- Own end-to-end FPGA development: requirements capture, functional block definition, HDL coding, simulation, synthesis, timing closure, and hardware integration
- Lead multi-board digital backplane and payload data bus design, driving compliance, margin validation, and derating analysis
- Define and manage verification and validation plans for full digital subsystems, integrating FPGA verification activities with system-level test
- Define FPGA-to-CPU/SoC interface architectures and collaborate with embedded software teams on protocol design and integration
- Develop and integrate COTS and custom IP cores into production-ready solutions
- Implement radiation mitigation strategies including TMR, ECC, and scrubbing for space applications
- Lead cross-team delivery of FPGA development milestones, managing dependencies and setting clear checkpoints
- Mentor peers and junior engineers, elevating design quality and development practices across the team
- Develop and maintain design documentation, ICDs, verification plans, and test reports
- Participate in all aspects of the product development lifecycle, from concept through production, integration, and launch
You will collaborate closely with avionics, embedded software, and test teams to build high-reliability, radiation-tolerant firmware solutions fielded on real spacecraft. As a senior contributor, you will mentor peers, raise the technical bar across the team, and introduce new approaches to complex problems.
REQUIREMENTS:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 5+ years of professional experience in FPGA design and development
- Deep expertise in VHDL and/or Verilog and FPGA synthesis flows
- Experience with Microsemi/Microchip, Xilinx/AMD, or Intel/Altera FPGA families and associated toolsets
- Experience with simulation and verification tools such as ModelSim, QuestaSim, or similar
- Experience designing and implementing high-speed Ethernet interfaces in FPGA fabric, including MAC/PHY integration, UDP/TCP offload, and high-throughput data path design
- Experience with Layer 2 Ethernet switch development, including frame forwarding, VLAN handling, and port arbitration
- Experience with other high-speed serial interfaces (PCIe) and common bus protocols (SPI, I2C, UART)
- Experience with radiation mitigation techniques for space-grade digital logic
- Experience reading and interpreting electrical schematics and collaborating with hardware design teams
- Excellent written and verbal communication skills
- Ability to maintain or obtain TS//SCI clearance
- Must be a U.S. citizen, lawful permanent resident, or eligible to obtain required ITAR authorizations
PREFERRED SKILLS:
- Experience with spacecraft FPGA development and space-qualified or radiation-hardened device families (PolarFire, ProASIC3, SmartFusion2, etc.)
- Experience defining and executing FPGA-to-CPU/SoC interface architectures in collaboration with embedded software teams
- Familiarity with SpaceWire and other spacecraft-specific data bus standards
- Familiarity with signal integrity analysis and high-speed digital design practices
- Exposure to software development in C, C++, or Python for firmware integration and test scripting
- Knowledge of schematic capture tools (Altium Designer preferred)
- Experience working in a fast-paced, startup environment or similarly dynamic setting
