SlipstreamJobs tracks this role from the company's public career site. Apply directly on the employer's site.
Salary: USD 100,000 - 500,000 / annual
Tenstorrent is seeking a Performance Architect for CPU Cluster to shape the performance and scalability of next-generation CPUs. This is a hands-on architecture role focused on how multiple CPU cores work together as a cluster—from cache hierarchies and coherent interconnects to memory bandwidth and overall system behavior.
You will use performance models and simulation to understand bottlenecks, explore tradeoffs, and influence architectural decisions early in the design process. Working closely with CPU architects, RTL designers, software and compiler teams, and system architects, you'll analyze workload behavior and translate performance insights into concrete architectural improvements.
Key responsibilities include:
- Analyze and optimize CPU cluster performance, including cache hierarchies, interconnects, coherence, and memory access behavior
- Build and use performance models and simulation environments (such as Gem5) to evaluate architectural concepts and identify performance opportunities
- Study real workloads to understand bottlenecks related to cache misses, coherence traffic, memory bandwidth, latency, contention, and core-to-core communication
- Lead architectural tradeoff studies across performance, scalability, bandwidth, latency, power, and implementation complexity
- Collaborate across CPU, cache, interconnect, memory, software, and system architecture teams to translate analysis into design decisions
You will learn how to architect, model, and optimize multi-core CPU clusters from early exploration through implementation and silicon, understand how cache coherence and memory hierarchy interact to determine system performance, and see how architectural decisions translate into real-world application performance.
The company is building high-performance RISC-V CPUs and AI platforms, valuing collaboration, curiosity, and commitment to solving hard problems. They welcome candidates at various experience levels; during interviews, candidates will be assessed for the appropriate level.
REQUIREMENTS:
- Strong foundation in CPU microarchitecture and performance, with understanding of how cores, caches, interconnects, and memory systems interact
- Experience using modeling, simulation, and workload analysis to understand cluster-level performance bottlenecks and scaling challenges
- Comfort moving between detailed microarchitecture and broader system-level questions around latency, bandwidth, quality of service, utilization, and scalability
- Analytical and hands-on approach, with ability to turn large amounts of performance data into clear architectural recommendations
- Strong communication skills and experience working across architecture, RTL, compiler, software, and system teams