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FPGA Verification Engineer II

CesiumAstro - Austin, TX, United States - In-office - posted 2026-09-23

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CesiumAstro is seeking an FPGA Verification Engineer II to join our team developing cutting-edge communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. This is a hands-on role in a dynamic startup environment focused on phased array technology for aerospace systems. You will contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification, and emulation infrastructure. Key responsibilities include developing and maintaining continuous integration and regression testing infrastructure, and creating state-of-the-art UVMf-based testbenches at both top-level and module-level using SystemVerilog, VIP, and DPI-C integration with existing MATLAB and Python numerical models. You will lead the development of reusable custom VIP modules and work closely with engineering and senior leadership to train and mentor engineers across all experience levels on UVMf testbench usage and modern FPGA/digital design approaches. You'll collaborate with modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing tools, and support the Lead Verification Engineer in evaluating FPGA and digital design processes with focus on Xilinx TLM models and QEMU-RP integration. Additional responsibilities include working with vendors to define requirements for future simulation model deliverables, maintaining knowledge of industry best practices in FPGA and digital design methodologies, and collaborating with engineering leadership to evaluate and implement process improvements. REQUIREMENTS: - Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering - Minimum 2 years of industry experience in verification and automation - Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU, and VIP - Understanding of digital design automation infrastructure including CI, regression testing, and HIL testing - Competency with Linux - Knowledge of vendor-provided FPGA development tools with focus on Xilinx tools - Must be a U.S. citizen, lawful permanent resident, conditional resident, asylee, or refugee, or eligible to obtain required authorizations from the U.S. Department of State (export control requirement)

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