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Electro-Optic Link Hardware Engineer

Lightmatter - Mountain View, CA, United States - Hybrid - posted 2026-09-24

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Salary: USD 155,000 - 190,000 / annual

Lightmatter is a venture-backed company leading the revolution in AI data center infrastructure through photonics innovation. The company invented Passage™, the world's first 3D-stacked photonics engine capable of connecting thousands to millions of processors at the speed of light for extreme-scale data centers supporting advanced AI and HPC workloads. The company raised $400 million in Series D at a $4.4 billion valuation. You will be a hands-on Photonics engineer leading verification and characterization of high-speed electro-optic links across multiple silicon and system programs. You'll work at the bench alongside the electro-optic engineering (EOE) team, owning modeling methodology, measurement standards, and serving as the escalation point for the toughest signal integrity and link-performance problems in the organization. Key responsibilities include: - Run hands-on lab characterization and debug of high-speed electrical/optical hardware, including novel failure modes - Build system-level electrical/optical/EO channel models and correlate them against bench measurements - Own link budget and verification methodology while staying hands-on with validating measurements - Characterize eye diagrams, BER, jitter, equalization, and channel impairments - Support silicon bring-up and root-cause debug with analog, package, PCB, and SerDes teams - Influence chip/package/system architecture tradeoffs based on bench findings - Mentor Senior/Staff engineers without stepping back from lab work - Build automation and tools to speed up characterization work This is a senior individual contributor role with mentoring responsibilities but no direct people management. You will guide and influence the work of other engineers while maintaining deep hands-on involvement in lab work and technical problem-solving. REQUIREMENTS: - MS/PhD in EE, Photonics, or Physics with 8+ years of experience, OR BS/MS with 10+ years of experience - Ownership of verification strategy for a full silicon/system program - Deep expertise in 56G/112G/224G+ serial links, SerDes equalization (CTLE/FFE/DFE), and signal integrity (S-parameters, crosstalk, link budgets) - Hands-on lab experience leading investigations that stalled others - Strong Python/MATLAB for team-used automation frameworks - Proficiency with VNA, scopes, BERTs, TDRs, and tools like ADS, HFSS, Cadence, COMSOL - Track record mentoring engineers PREFERRED QUALIFICATIONS: - Silicon photonics/EO systems at the architecture level - Package/PCB/channel co-design ownership - COM/IBIS-AMI modeling, patents/standards contributions (OIF, IEEE 802.3)

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