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Tenstorrent is building cutting-edge AI compute platforms, including high-performance RISC-V CPUs designed from scratch. The company is revolutionizing performance, ease of use, and cost efficiency in AI computing by unifying innovations across software models, compilers, platforms, networking, and semiconductors.
You will lead Tenstorrent's Bangalore-based CPU Core Design Verification team, owning both technical strategy and people leadership for verification of high-performance, out-of-order RISC-V CPUs. You will manage a team of core-level verification engineers, partner closely with Santa Clara and Austin sites, and drive delivery of core verification from architecture definition through tapeout readiness.
Key responsibilities include:
- Build and lead the Bangalore CPU Core DV team, owning hiring, mentoring, performance management, and team growth.
- Own verification strategy and execution for high-performance, out-of-order RISC-V CPU cores, covering ISA, microarchitecture, UVM/CVM methodology, infrastructure, and coverage.
- Drive cross-site execution with DV and design leads in Santa Clara and Austin, aligning coverage, schedules, tapeout readiness, and closure of critical bugs and coverage gaps.
- Stay technically engaged while leading the team, contributing to debug, code/testplan and architecture reviews, and championing AI-assisted tools for triage, stimulus generation, and coverage analysis.
You will learn how Tenstorrent designs and verifies high-performance RISC-V CPU cores across a globally distributed organization, scales verification teams and infrastructure across core, cluster, and chip-level environments, spans pre-silicon, emulation, and post-silicon verification with shared stimulus and methodology, applies AI across the DV lifecycle (from test planning through regression debug and coverage analysis), and builds high-performing verification organizations within fast-growing silicon companies.
The role is hybrid based out of Bangalore with regular collaboration across the globally distributed CPU organization.
REQUIREMENTS:
- 15+ years of CPU/DV experience, including 7+ years leading verification teams
- Strong hands-on expertise in high-performance, out-of-order CPU verification
- Deep microarchitecture & verification expertise, including ISA, RTL, UVM/CVM, testbench development, regressions, coverage, and complex debug
- Strong people and technical leadership, with experience hiring, mentoring, developing engineers, and setting verification strategy and methodology across teams
- Highly collaborative and execution-focused, comfortable working across time zones and driving cross-functional debug with Design, DV, Emulation, and Post-Silicon teams, including P0 issues and AI-assisted verification workflows
Note: Candidates will be assessed during the interview process for the appropriate level, and offers will align with that level, which may differ from the posting level.
