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Axiado is seeking a VP of Hardware Systems Engineering to lead the hardware organization and own the complete product lifecycle of the Axiado Trusted Control/Compute Unit (TCU) from concept through high-volume production. This is a hands-on executive role requiring deep technical expertise in hardware design, debugging, and lab validation, combined with strong leadership capabilities.
You will manage senior engineers and contractors while driving TCU-based embedded systems from initial concept to mass production. Key responsibilities include optimizing design for manufacturability (DFM) and design for test (DFT), managing factory test coverage and production yields, and overseeing technical resolution of customer field returns through failure analysis and corrective actions. You will personally lead first-silicon and platform bring-up, conduct low-level bus validation, and manage EVT/DVT testing in the lab.
The role requires active partnership with cross-functional teams including ASIC, silicon, firmware, and software engineers to isolate and resolve complex system bugs. You will drive schematic development in Cadence OrCAD, collaborate with layout, mechanical, and signal integrity engineers, and ensure designs meet OCP DC-SCM and NVIDIA IFF form factors. Additionally, you will represent the company within the Open Compute Project (OCP) and other industry hardware forums, integrate OCP DC-SCM standards, and help customers build secure server infrastructure.
Supply chain agility is critical—you will pivot board layouts responsively based on real-time parts availability and manage relationships with tier-1 suppliers in dynamic, supply-chain-constrained environments.
Requirements:
- 20+ years of hardware engineering experience with a leadership track record in server, data center, or semiconductor ecosystems
- B.S. or M.S. in Electrical Engineering (EE)
- Proven history of taking complex board designs to high-volume production with excellent yields and resolving field RMA issues
- Deep, continuous hands-on experience with circuit design, schematic capture, laboratory equipment, and platform troubleshooting
- Strong knowledge of OCP DC-SCM standard solutions (DC-SCI interface, form factors) and solid network across hyperscaler and OEM partners
- Demonstrated capability to execute rapid hardware redesigns, footprint compatibility strategies, and alternative component sourcing
- Expert familiarity with Cadence OrCAD/Allegro and server interfaces (PCIe, USB, I2C, SMBus, SPI, UART, USB, MCTP, eSPI, LTPI)
- Solid understanding of modern CPU/GPU architectures and Linux environment (including Python or Bash scripting)
- Exceptional verbal and written communication skills to articulate hardware-anchored security and supply chain strategy to enterprise stakeholders
