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Codasip is redefining computing through cyber-resilient semiconductor architectures, building next-generation processors where security is embedded at the core by design. Following a strategic pivot toward CHERI-enabled technologies, the company is expanding its team of verification engineers to work on clean-sheet CPU designs and advanced processor architectures.
In this role, you will verify RISC-V processors and extensions, developing comprehensive verification solutions including test benches, stimulus generation, and formal verification environments. You'll collaborate with a global team to define verification strategies for blocks and subsystems, taking ownership of verification activities from start to finish. Key responsibilities include reviewing technical specifications from a verification perspective, running simulations, hunting bugs, performing root cause analysis on complex issues, and crafting automated verification flows. You'll also define, estimate, prioritize, and track your own work while monitoring and reporting verification metrics.
Codasip's Czech Design Centers in Brno and Prague, launched in 2014, are driving innovation in cutting-edge RISC-V CPU development. You'll work on high-performance, low-power CPU cores designed from scratch for supercomputing and next-generation embedded systems. This is an opportunity to join a team verifying complex, state-of-the-art CPUs including advanced out-of-order processors, setting high standards for a brand-new platform while collaborating with an international team of world-class engineers across Europe.
REQUIREMENTS:
- Commercial experience with functional processor verification methodologies applied to CPU or ASIC verification (simulators, test generation, coverage collection, gate-level simulation)
- Knowledge of verifying CPU architectures or other IP
- Fluency in SystemVerilog, Python, C++, Rust, or similar languages with ability to write clear, concise code
- Past verification ownership of a design block
- User knowledge of Linux for task automation
- Knowledge of versioning tools (Git, SVN)
- Knowledge of RISC-V Architecture
- Good knowledge of computer systems and architecture
- Analytical thinking and team collaboration skills
- Ability to work effectively across teams to debug issues and find root causes
- Currently located in and with working rights in the Czech Republic
