SlipstreamJobs tracks this role from the company's public career site. Apply directly on the employer's site.
Normal Computing is an applied AI company building foundational hardware and software for the semiconductor industry and critical AI infrastructure. The company operates across multiple global hubs including Mountain View, New York City, London, Copenhagen, and Seoul.
As Technical Program Manager, you will partner with engineering leadership to translate company objectives into actionable milestones across the engineering organization. You will own the complete schedule for the silicon development lifecycle, from architecture and micro-architecture through RTL generation, verification, logic synthesis, design for test, physical design, physical verification, tapeout, packaging, post-silicon testing, bring-up, and post-silicon validation.
Key responsibilities include:
- Breaking down strategic objectives into concrete engineering milestones
- Owning and managing schedules across the entire silicon development cycle
- Coordinating efforts across distributed teams in Mountain View, New York, London, Zurich, and Copenhagen
- Defining metrics, building dashboards, and establishing tracking mechanisms to surface progress
- Identifying and mitigating risks to delivery schedules and quality
- Synthesizing complex technical status, trade-offs, and risks into clear executive updates
You will work closely with engineering leads to ensure the organization ships on time while maintaining visibility into project health across all phases of semiconductor development.
REQUIREMENTS:
- 10+ years in semiconductor development, including 3+ years as a TPM or program lead on complex ASIC or SoC architectures
- Excellent communication and stakeholder management skills; ability to influence without authority
- Experience in companies with complex software/hardware integration
- Proven track record managing internationally distributed engineering teams
- Proficiency with program management tools (Jira, Asana, or Linear)
- Experience with every element of the silicon lifecycle from architecture and RTL generation to verification, tapeout, bring-up, and post-silicon validation
- Ability to think creatively to find solutions
BONUS QUALIFICATIONS:
- Ph.D. in electrical engineering or related discipline
- Familiarity with chiplets and 3D packaging
- Expert proficiency with Linear for program management
- Familiarity with heterogeneous systems used for AI inference
- Experience working with external silicon foundries, Tier II vendors, and OSAT vendors
- Prior experience at a silicon startup
