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onsemi is seeking a Staff Analog IC Design Engineer to join the Sensor Interface Division design team in Bangalore. The team develops high-speed communications chips for automotive applications, specifically low-power high-speed mixed-signal ICs for automotive Ethernet and automotive SerDes.
In this role, you will architect, specify, and implement PLL (Phase-Locked Loop) and other subsystems, leading chip-level integration, simulations, and silicon validation. You will participate in feasibility studies and architecture definitions for new products, generate detailed specifications and verification plans for analog blocks and systems, and develop Matlab and Verilog-A models of analog blocks related to PLL. Your responsibilities include designing low-power high-speed analog systems with design, verification, and layout supervision; integrating analog blocks into complex mixed-signal System-on-Chip (SoC) designs; performing top-level mixed-signal simulations; silicon evaluation and characterization of designed blocks in the lab; supporting production test development and qualification; and contributing to design methodology and design flow improvements.
The role offers opportunities to work on world-class products in a team-oriented atmosphere with continual learning and growth opportunities. You will be part of an international company with exposure to interesting global projects and a competitive benefits package.
REQUIREMENTS:
- Bachelor's degree in Electrical Engineering (BSEE), Master's degree (MSEE), or Ph.D.
- Minimum 6-10+ years of IC design work experience
- Extensive experience in high-performance complete PLL design from scratch with at least 1 tape-out and silicon success
- Experience designing low phase noise/jitter integer PLLs and fractional-N synthesizers
- Strong knowledge of bandgaps, bias circuits, op-amps, LDOs, feedback and compensation techniques
- Experience in VCO design, including LC VCOs
- Strong knowledge of loop design to optimize for phase noise/jitter, lock time, reference spur, area, and power
- Good knowledge of low-noise design techniques and high-precision techniques in presence of device mismatch
- Experience in C/Matlab/Verilog-A modeling
- Demonstrated ability to understand device physics and apply it to optimize noise, power, area, and frequency of PLL blocks
- Good working experience with spectrum analyzers, oscilloscopes, signal generators for analog design validation
- Experience working with production test engineers on test plans and design for testability
- Experience with IP integration and mixed-signal IC verification
- Strong English written and verbal communication skills
- System knowledge of automotive SerDes/Ethernet and link budget analysis (advantageous)
ADDITIONAL SKILLS (nice-to-have):
- Leading project activities
- Lab measurements and characterization equipment
- Scripting languages
- Digital design
