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Salary: USD 187,000 - 261,500 / annual
Neros Technologies is a defense technology company designing and manufacturing high-performance unmanned systems (drones) tested in combat and built at scale. The company operates with a fast, hands-on culture focused on closing the gap between design and deployment.
As a Senior Wireless Engineer, you will translate modem and waveform designs from MATLAB/Simulink models into real, deployable hardware. Working directly under the Senior Wireless Systems Engineer II, you will own the full implementation pipeline: converting floating-point models to bit-true, fixed-point designs in C and RTL for FPGAs and SoCs, verifying implementations against golden references, and optimizing for timing and resource utilization. Your work will get real waveforms onto drones and operational over the air.
Key responsibilities include:
- Implementing modem and physical-layer blocks (modulation/demodulation, synchronization, equalization, channel coding/FEC) from MATLAB/Simulink into RTL (Verilog/VHDL) and embedded C
- Owning fixed-point conversion from floating-point models, analyzing quantization, precision, and dynamic-range trade-offs
- Building bit- and cycle-accurate testbenches to verify RTL and C implementations against MATLAB/Simulink golden references
- Closing timing and optimizing LUT, DSP, and BRAM utilization on Xilinx/AMD or Intel FPGAs and SoCs
- Partitioning the signal chain between FPGA fabric and embedded processor, co-designing the hardware/software boundary
- Debugging the physical layer on captured and live signals alongside communications systems, RF, and firmware teams
You will work directly with the Principal Communications Systems Engineer to take waveforms from model to silicon.
REQUIREMENTS:
- Bachelor of Science in Electrical Engineering, Computer Engineering, or related field (required); Master's degree highly preferred
- 7+ years implementing DSP or communications algorithms in RTL (Verilog/VHDL) and/or embedded C for FPGA or SoC targets
- Strong DSP and digital communications fundamentals: modulation, synchronization, equalization, filtering, and FEC/channel coding
- Demonstrated experience with fixed-point conversion and bit-true implementation from MATLAB/Simulink models
- Proficiency with FPGA design flow: simulation, synthesis, timing closure, and resource optimization (Vivado/Vitis or Quartus)
- Experience building testbenches and verifying implementations against a golden reference model
NICE TO HAVE:
- Model-Based Design: generating or hand-optimizing HDL and C from Simulink using MATLAB HDL Coder and Embedded Coder
- Wireless Modems: hands-on implementation of end-to-end modem (OFDM, spread spectrum, or single-carrier) that shipped in hardware
- SoC Integration: Zynq, RFSoC, or similar SoCs, including AXI interfaces and hardware/software co-design
- RF/SDR Familiarity: understanding of RF front-end, data converters (ADC/DAC), and software-defined radio pipelines
- Advanced FEC: hardware implementation of LDPC, Turbo, Viterbi, or Reed-Solomon decoders
