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Axiado is seeking a Senior System Level Verification Engineer to join its Design Verification Technical Team. You will be responsible for chip-level verification of complex ARM-based SoC hardware, including debugging, ROM validation, and firmware bring-up. This role focuses on developing robust system-level test environments and ensuring the quality of Axiado's Trusted Control/Compute Unit (TCU) semiconductor technology.
Key Responsibilities:
- Develop SoC system-level test environments for simulation and emulation, including log generation, backdoor configuration, and device modeling
- Develop comprehensive testplans and test cases, including error condition and stress tests
- Execute and debug tests in regressions across both simulation and emulation platforms
- Collaborate with cross-functional teams to root-cause hardware issues and create system-level test cases
- Perform validation ROM development and testing
- Work with the software team to debug device driver issues and OS boot sequences
- Validate complex IP interfaces and post-silicon behavior
About Axiado:
Axiado is a fast-growing, well-funded silicon and systems company founded in 2019, now with over 150 employees. The company pioneers a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that combines advanced hardware security, AI-driven resilience and efficiency, and real-time platform management. Axiado's technology protects critical infrastructure from data centers to next-generation cloud and AI platforms by securing systems at the hardware foundation level, independent of host CPUs and operating systems. The company has been recognized as one of Fast Company's 2025 Top 10 Most Innovative Companies in Security and won the 2025 Global InfoSec Award for Outstanding AI Security Solution.
Requirements:
- 7+ years of design verification or validation experience, with at least 5 years specifically in system-level verification using C
- Demonstrated experience through a complete project cycle of an SoC ASIC chip
- Thorough understanding of CPU and its debug architecture, as well as SoC system architecture
- Proficiency in programming and modeling typical SoC-connected devices (JTAG, UART, SPI, I2C)
- Proficiency in testplanning, test case development using C, and self-checking test methodologies
- Proficiency in RTL debugging using waveform viewers
- Mastery in C programming and fluency in scripting languages (Make, Python, Perl, shell script)
- Fluency with documentation and issue tracking tools (Confluence, Jira)
Preferred Experience:
- Validation on emulation, FPGA, and post-silicon platforms
- Complex IP interface validation (USB, Ethernet, PCIe, DDR)
- Experience using AI tools in testplanning, generation, and debugging
