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Axiado is seeking a Senior System Level Verification Engineer to join its Design Verification Technical Team. You will be responsible for chip-level verification of complex ARM-based SoC hardware, including debugging, ROM validation, and firmware bring-up.
Key Responsibilities:
- Develop SoC system-level test environments for simulation and emulation, including log generation, backdoor configuration, and device modeling
- Develop comprehensive testplans and tests, including error condition and stress tests
- Execute and debug tests in regressions across both simulation and emulation platforms
- Collaborate with other teams to root-cause hardware issues and create system-level test cases
- Perform validation ROM work
- Partner with the software team to debug device driver issues and OS boot sequences
About Axiado:
Axiado is a fast-growing, well-funded silicon and systems company pioneering Trusted Control/Compute Units (TCUs) that combine advanced hardware security, AI-driven resilience, and real-time platform management. Founded in 2019 with over 150 employees, the company protects critical infrastructure by securing systems at the hardware foundation level. Axiado has won multiple industry awards, including Fast Company's 2025 Top 10 Most Innovative Companies in Security and the 2025 Global InfoSec Award for Outstanding AI Security Solution.
Requirements:
- 7+ years of design verification or validation experience, with 5+ years specifically in system-level verification using C
- Demonstrated experience through a complete project cycle of an SoC ASIC chip
- Thorough understanding of CPU and debug architecture, as well as SoC system architecture
- Proficiency in programming and modeling typical SoC-connected devices (JTAG, UART, SPI, I2C)
- Proficiency in testplanning, test case development using C, and self-checking test methodologies
- Proficiency in RTL debugging using waveform viewers
- Mastery of C programming and fluency in scripting languages (Make, Python, Perl, shell script)
- Fluency with documentation and issue tracking tools (Confluence, Jira)
Preferred Experience:
- Validation on emulation, FPGA, and post-silicon platforms
- Complex IP interface validation (USB, Ethernet, PCIe, DDR)
- Experience with AI tools in testplanning, generation, and debugging
- SPDM, PLDM, MCTP protocol experience
- Caliptra and Crypto/security API experience
- Bootloader and platform firmware experience (initialization, boot flows, reset handling, recovery, firmware-update mechanisms)
- Understanding of firmware authentication, signature verification, and OTP provisioning
