SlipstreamJobsFresh Startup & VC-Backed Jobs

Senior FPGA Verification Engineer

Anduril - Waltham, MA, United States - In-office - posted 2026-10-16

Apply on the company site

SlipstreamJobs tracks this role from the company's public career site. Apply directly on the employer's site.

Salary: USD 191,000 - 253,000 / annual

Anduril Industries, a defense technology company, is seeking a Senior FPGA Verification Engineer to join the Imaging team in Waltham, Massachusetts. The Imaging team develops state-of-the-art imaging systems across hardware and software, leveraging computer vision, perception, electro-optical, infrared, and sensor data to support U.S. and allied military capabilities. In this role, you will work with an interdisciplinary technical team to design new product lines, complete design and analysis, build prototypes leading to ground and flight testing, and mature prototypes into production systems. You will provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status. Key responsibilities include: - Design verification environment architecture using SystemVerilog, OVM/UVM, and related methodologies - Create written test plans, test cases, and track code and functional coverage - Develop testbenches for RTL block verification using VHDL or SystemVerilog - Recommend new tools and practices for continuous improvement in ASIC/FPGA verification flows - Contribute to engineering estimates for new program pursuits - Provide technical leadership and mentorship to verification teams Required Qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field - 8+ years of experience developing HDL firmware for FPGA devices - Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in professional FPGA or ASIC development environments - Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog - Experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog) - Experience with revision control systems such as Git or Subversion - Eligible to obtain and maintain an active U.S. Secret security clearance Preferred Qualifications: - Experience with ASIC/FPGA lab validation and debug using standard lab equipment, with familiarity with DFT, manufacturability, and production test concepts - Proficiency with Unix/Linux environments, scripting or software development (C, C++, Python, Perl, or shell) - Experience with industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado

Similar roles