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Salary: USD 165,000 - 218,000 / annual
Anduril Industries is a defense technology company transforming U.S. and allied military capabilities through advanced technology. The company develops state-of-the-art systems powered by Lattice OS, an AI-powered operating system that integrates thousands of data streams into real-time 3D command and control centers. The Imaging team develops imaging systems across hardware and software, leveraging computer vision, perception, electro-optical, infrared, and sensor data to provide warfighters and allies with critical advantages.
The Senior FPGA Verification Engineer will join the Imaging team to help design new product lines. You will work closely with an interdisciplinary technical team to define designs, complete analysis, build prototypes leading to ground and flight testing, and mature prototypes into production systems.
Key responsibilities include:
- Design and architect verification environments using SystemVerilog, OVM/UVM, and related tools
- Create written test plans, test cases, and track code and functional coverage
- Develop testbenches for RTL block verification using VHDL or SystemVerilog
- Recommend new tools and practices to improve the group's ASIC/FPGA verification flow
- Contribute to engineering estimates for new program pursuits
- Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
REQUIREMENTS:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field
- 8+ years of experience developing HDL firmware for FPGA devices
- Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in professional FPGA or ASIC development environments
- Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog
- Experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
- Experience using revision control systems such as Git or Subversion to manage source code and maintain configuration integrity
- Eligible to obtain and maintain an active U.S. Secret security clearance
PREFERRED QUALIFICATIONS:
- Experience with ASIC/FPGA lab validation and debug using standard lab equipment, along with familiarity with DFT, manufacturability, and production test concepts
- Proficiency with Unix/Linux environments, scripting or software development (C, C++, Python, Perl, or shell), and industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado
