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CesiumAstro develops advanced communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We are seeking a Principal FPGA Engineer to join our dynamic, cross-functional team in a hands-on startup environment.
In this role, you will own FPGA circuits and systems across all phases of development, from architecture and RTL design through verification, testing, and deployment. You will develop advanced FPGA architectures, high-speed serial interfaces, digital processing cores, and management interfaces. Your work will span complex multi-clock domain designs, digital signal processing, and board-level hardware integration.
As a principal-level engineer, you will serve as a technical advisor to engineering leadership, customers, and program teams on advanced FPGA technologies and complex engineering challenges. You will lead advanced technical reviews, customer discussions, and multidisciplinary design efforts. You will mentor senior FPGA engineers, promote advanced engineering practices, and drive innovation in FPGA design methodologies, verification approaches, and implementation techniques. You will present engineering design review materials to customers and the executive team, and participate in proposal-writing efforts. Excellent written and verbal communication skills are essential.
Key responsibilities include: developing advanced FPGA architectures and RTL designs supporting emerging technologies; contributing to new FPGA design principles and verification methodologies; leading complex engineering studies and technical investigations; directing FPGA integration, hardware bring-up, verification, and design validation; evaluating simulation results, timing closure, and hardware performance; guiding verification strategies and technical recommendations; serving as technical advisor on FPGA technologies; leading technical reviews and customer discussions; mentoring senior engineers; advancing FPGA engineering practices through innovation; and evaluating existing technologies to identify improvement opportunities.
REQUIREMENTS:
- Bachelor of Science (BS) or Master of Science (MS) in Electrical Engineering or Computer Engineering from an accredited institution
- 15+ years of experience in FPGA design, analysis, and implementation at the HDL level
- Expert-level knowledge of FPGA design fundamentals (HDL/HLS design entry, verification, logical and physical synthesis, place-and-route)
- Expert-level knowledge of geographically distributed Linux-based CI/CD automation infrastructure
- Expert-level knowledge of AMD Versal toolchains and flow methodologies using Vivado, Vitis, Embedded Development Framework, AIE, and HLS development tools
- Strong foundational DSP skills (NCO, FIR, FFT, etc.)
- Expert-level knowledge of FPGA optimization strategies for utilization, power, thermal, and compute performance
- Strong foundational knowledge of UVM(f)-based verification
- Strong sense of ownership in delivering high-quality implementations with focus on modularity, verification, and HIL-based regression gating
- Ability to maintain a robust training and mentorship pipeline for early-career engineers
- Ability to independently execute and deliver challenging projects without direct supervision
- Ability to collaborate with senior technical leadership while maintaining positive attitude and growth mindset
- Ability to maintain, evaluate, and apply new tooling and design methodologies from industry partners such as AMD and Siemens
- Must be a U.S. citizen, lawful permanent resident, conditional resident, asylee, or refugee, or eligible to obtain required authorizations from the U.S. Department of State
