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Axiado is seeking a Systems Architect to define end-to-end architecture bridging silicon (ASIC/SoC), board-level hardware platforms, and low-level system software/firmware. This role combines deep technical expertise in server and infrastructure design with customer-facing leadership.
Key Responsibilities:
Architectural Definition & Specification: Own and author comprehensive system architecture specifications, micro-architectural specs, and platform requirement documents. Define rigorous system-level hardware/software partition boundaries and map out register-level interfaces for hardware blocks and low-level software stacks. Drive micro-architecture specifications for high-security, AI-driven SoCs, including on-chip interconnects (AXI/AHB), memory hierarchies, and standard I/O interfaces (PCIe, Ethernet, SPI, eSPI, I3C, LTPI).
Customer Interfacing & Ecosystem Engagement: Serve as a primary technical point of contact for enterprise and hyperscaler customers to gather, analyze, and scope next-generation platform security needs. Present Axiado's system architecture roadmap and technical whitepapers to strategic customers, steering-level partners, and standards committees. Align Axiado's technology with modern server deployment topologies and open-source standards (OCP DC-SCM / DC-SCI).
Server Infrastructure & Board-Level Integration: Architect platform-level designs optimized for enterprise server motherboards, baseboard management systems, and cloud data center environments. Guide hardware and SI/PI engineers on signal integrity, power delivery networks, and thermal/mechanical constraints for modular server building blocks.
Software, Firmware & Security Stack Partitioning: Specify secure platform boot flows, Root-of-Trust (RoT) architecture, and Platform Firmware Resiliency (PFR) frameworks. Collaborate with firmware teams to define interfaces for BMC stacks (OpenBMC), Linux kernels, device drivers, and platform management protocols (MCTP, PLDM, Redfish).
Requirements:
Required: 10+ years of dedicated system architecture experience spanning SoC design, board development, and software stacks. Proven track record of engineering and architectural success within the server, data center, or enterprise infrastructure industry. Demonstrated ability to independently produce and maintain highly detailed, production-grade technical specifications. Excellent communication and presentation skills with comfort interfacing directly with sophisticated enterprise customers and technical stakeholders. B.S., M.S., or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or related field. Deep knowledge of SoC design flows, interconnects, and interfaces (PCIe, Ethernet, DRAM, USB). Hands-on experience with hardware platform design, schematic capture, and lab bring-up tools (oscilloscopes, logic analyzers). Clear understanding of embedded firmware, RTOS, Linux device drivers, and low-level C/C++ programming.
Preferred: Active participation in open infrastructure communities like the Open Compute Project (OCP). Deep understanding of hardware security concepts (cryptographic accelerators, HSM, TPM, side-channel attack mitigations). Experience with BMC firmware architecture (OpenBMC) and server management interfaces (MCTP, NVMe-MI, LTPI). Proven history of taking complex board designs to high-volume production with excellent yields and resolving field RMA issues. Expert familiarity with Cadence OrCAD/Allegro and server interfaces. Solid understanding of modern CPU/GPU architectures and the Linux environment (including Python or Bash scripting).