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AttoTude is seeking an experienced Digital IC Design Engineer to join a growing team developing cutting-edge DSP and mixed-signal ICs for wideband high-speed applications. The company is at the forefront of revolutionizing data centers through advanced interconnect technology based on wired THz transceivers, eliminating networking bottlenecks for AI data centers.
In this hands-on technical role, you will work as part of an experienced design team on digital ASIC development. Key responsibilities include:
- Flow system-level requirements into architecture and design specifications
- Collaborate with communications systems engineers to recommend implementation options optimizing power, performance, and area
- Document and write RTL code to meet system requirements
- Develop SystemVerilog testbenches and testcases for comprehensive design verification
- Create timing constraints, synthesize designs, and perform static timing analysis and timing closure
- Execute gate-level simulations
- Support lab work and hardware/software integration post-tapeout
- Work cross-functionally to ensure timely project execution and design tape-outs
- Stay current with trends in wideband high-speed IC design and apply innovations to improve outcomes
- Occasional travel to the Bay Area (<10%) despite remote position
This is a senior individual contributor role requiring deep technical expertise and the ability to work effectively within a team of highly experienced engineers.
**Requirements:**
Required:
- 5+ years of hands-on experience in CMOS (bulk and FinFET) digital IC design across various process technologies
- Proven strong coding and verification experience in SystemVerilog
- Scripting language proficiency: Tcl, Python, and shell scripts
- Knowledge of bus interfaces: PCIe, AXI, UCIe, SPI, I2C, APB
- Strong communication and teamwork skills
- Bachelor's degree in Electrical Engineering or related field
Preferred:
- Experience designing high-speed modems, SerDes, DSP blocks, FFTs, clock recovery, carrier recovery, digital filters, CTLE, DFE, and MLSE
- Experience matching and debugging MATLAB models and vectors in RTL/gate-level simulations
- Experience working on multidisciplinary teams with systems, RF, mixed-signal, and software engineers
- Proficiency with Cadence tools: XCelium, Genus, Tempus, Conformal, and Voltus
- Experience delivering IP blocks to internal and external customers
- Ability to drive innovation and implement new design methodologies
- Master's degree in Electrical Engineering, Computer Engineering, or related field
