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Axiado is an AI-enhanced security processor company building silicon-rooted security and management chips for AI data center infrastructure. The company was founded in 2017, has 100+ employees, and recently closed a $100M+ Series C+ round in December 2025.
You'll work across the full stack from model to silicon, optimizing training and inference performance on GPU and AI-accelerator infrastructure while designing and tuning models. This role bridges algorithm work, systems-level software, and infrastructure—a rare opportunity to see the complete cycle of AI silicon development from model design down to chip implementation.
Key responsibilities include:
- Optimizing training and inference performance across GPU and AI-accelerator infrastructure, including MLOps pipelines
- Designing, training, evaluating, and productionizing ML models (deep learning, LLM, computer vision, or recommendation systems)
- Hardening and extending NPU cores (e.g., CoralNPU-based tensor cores) into production silicon
- Building or optimizing inference engines and serving runtimes against real hardware constraints—latency, memory, and power
- Working below the application layer with BMC firmware, embedded Linux, or RTOS (e.g., Zephyr) to ensure AI features run reliably on real systems
- Building automated test and verification harnesses for AI-assisted RTL/DV, hardware bring-up, or manufacturing test
- Applying ML to security—AI-driven log/intrusion analysis, AI-assisted penetration testing, or firmware/hardware security work
- Collaborating closely with RTL/hardware, firmware, and QA teams to ship AI features end-to-end from training through deployment and monitoring
Axiado values solving real-world problems over purely theoretical work, preferring individuals with persistence, intelligence, and high curiosity. The company emphasizes working hard and smart, continuous learning, and mutual support.
REQUIREMENTS:
- 5–7+ years of hands-on AI/ML experience; Master's degree required, PhD preferred
- Hands-on experience with AI/ML infrastructure and performance (GPU clusters, distributed training, inference-serving optimization, MLOps pipelines)
- Model and algorithm development experience (designing, training, and evaluating ML models)
- Experience taking models into production (feature engineering, data pipelines, deployment)
- AI chip and hardware-aware ML experience (optimizing inference engines for specific chips, or adapting model architecture/quantization to chip constraints)
- Deep, hands-on expertise in at least 2 of the following 5 specialty areas:
• NPU/AI-accelerator: hardening or extending an NPU core into production silicon, mapping models onto MAC/tensor-engine constraints, or NPU-aware RTL/DV work
• Systems/sys-level software: BMC firmware, embedded Linux, RTOS (e.g., Zephyr), or other low-level system software
• Inference engine/runtime: built or materially optimized an inference engine or serving runtime against real hardware constraints
• Test/verification harness: built an automated harness that closes a loop (e.g., agent-driven RTL/DV test runner or hardware bring-up/MFG test harness)
• Cybersecurity: AI-driven log/intrusion analysis, AI-assisted penetration testing, or firmware/hardware security
