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Sr. Staff Engineer, IP Runtime

Tenstorrent - Austin, TX, United States - Hybrid - posted 2026-10-09

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Salary: USD 100,000 - 500,000 / annual

Tenstorrent is building cutting-edge AI acceleration hardware and software, including a custom RISC-V CPU and specialized accelerator IP. This role focuses on the runtime layer that bridges hardware and software—defining how workloads are dispatched, scheduled, synchronized, and executed across the accelerator platform. You will work at the hardware/software boundary to design and implement the runtime architecture that controls execution, scheduling, synchronization, and resource management. Key responsibilities include: - Define runtime architecture and implementation for Tenstorrent's custom processor, accelerator, memory, and data-movement IP. - Build low-level runtime components that initialize hardware IP, dispatch work to processor and accelerator engines, coordinate dependencies, and manage resources efficiently. - Design runtime interfaces and data-movement paths that make memory access, synchronization, and execution efficient and predictable. - Analyze bottlenecks across the runtime and hardware/software stack, then drive improvements in latency, throughput, scalability, and reliability. - Influence the direction of the runtime stack, engage with customers and field-facing teams, and translate real-world workload needs into runtime improvements. - Remain hands-on with design, coding, performance analysis, bring-up, and debugging. You will learn how runtime software exposes and controls custom silicon IP, how custom silicon IP blocks work together as a complete execution platform, advanced techniques for execution control and synchronization on massively parallel hardware, and how runtime and hardware co-evolve to improve model throughput and efficiency. The role is hybrid, based in Toronto, ON or Austin, TX. Tenstorrent welcomes candidates at various experience levels; during the interview process, candidates will be assessed for the appropriate level, and offers will align with that level. **Requirements:** - Expert-level C or C++ engineer with a track record of designing and delivering complex, performance-critical systems. - Experienced working close to hardware in low-level, embedded, bare-metal, or accelerator environments, with ability to translate hardware specifications into reliable software behavior. - Strong in runtime fundamentals, including command execution, scheduling, synchronization, memory movement, resource management, and parallelism. - Skilled at debugging and optimizing systems end-to-end, especially at the hardware/software boundary. - Technical leader who collaborates effectively across hardware, firmware, compiler, and systems teams and mentors other engineers. - Must be eligible to access U.S. export-controlled technology; citizenship/permanent residency status or ability to obtain prior license approval from U.S. Commerce Department may be required due to EAR compliance.

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