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MatX is building vertically integrated full-stack solutions for AGI compute, from silicon to systems. As a Silicon Validation Engineer, you will own silicon bring-up and validation activities from first power-on through feature validation, characterization, qualification, and production readiness.
Key responsibilities include developing and executing comprehensive validation plans for chip-level and SiP-level functionality, performance, reliability, and system behavior. You will validate critical flows including power-up, initialization, boot, reset, recovery, power management, and error handling. Your work spans compute, memory, interconnect, data movement, high-speed interfaces, and package-level functionality.
You will create and execute high-stress workloads that exercise bandwidth, latency, concurrency, coherency, error handling, and long-duration operation. Working across Top-level DV, Palladium emulation, lab validation, and package validation, you'll shift validation left and improve correlation between environments. You will bring up complex hardware and debug failures using registers, logs, traces, waveforms, firmware output, diagnostics, protocol analyzers, and lab equipment.
Analyzing failures across RTL, firmware, drivers, software, board, package, and silicon boundaries is central to the role. You'll work closely with firmware teams to debug low-level software and hardware interactions, review firmware and embedded software as part of failure analysis, and collaborate with architecture and design teams to understand intended behavior and microarchitecture.
Additional responsibilities include defining validation, observability, and debug requirements for effective silicon troubleshooting; supporting package-level validation including connectivity, power, signal integrity, and thermal behavior; driving root-cause investigations; developing scripts and test infrastructure to improve validation execution; and tracking validation coverage and readiness against product milestones.
