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Graphcore is seeking a Hardware Validation & Debug Engineer to validate memory and system interfaces for advanced AI compute hardware. You will work hands-on in the lab to prove Graphcore silicon and platforms operate reliably across real product conditions.
In this role, you will create and execute validation and debug plans for new hardware platforms, with a focus on LPDDR5-9600 memory subsystems, slow-speed interfaces, PCB issues, power behavior, and signal integrity. You will investigate hardware failures, tune memory subsystems, and translate complex technical findings into clear actions for hardware and firmware teams.
You will collaborate closely with Architecture, Silicon Engineering, Hardware Engineering, Firmware, PCB design, power, and signal integrity teams. The team values lab evidence, practical judgment, and clear debug reporting. You will own bring-up activities, drive root cause analysis, and keep issues moving across teams. Decisions are made close to the data, and you will be expected to challenge assumptions and help teams select the right corrective actions.
This is hands-on work with real ownership. You will work independently, take responsibility, and drive issue resolution across multiple technical disciplines.
REQUIREMENTS:
- Strong hands-on hardware debug experience, including board bring-up and subsystem debug
- Experience validating and tuning LPDDR memory subsystems, ideally including LPDDR5
- Ability to debug PCB, power, signal integrity, and interface issues through to root cause
- Knowledge of DDR training, timing optimization, margin analysis, eye diagrams, and stability validation
- Confident use of lab instrumentation, including high-bandwidth oscilloscopes, BERT systems, and VNA/TDR equipment
- Ability to work independently, take responsibility, and drive issue resolution across hardware and firmware teams
The company welcomes transferable skills and diverse experiences; if you meet most essential criteria, you are encouraged to apply.
